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dac
- DAC converter design with Verilog code and testbench
tlv5620芯片的Verilog语言DAC转换代码
- tlv5620芯片的Verilog语言DAC转换代码,tlv5620 chip Verilog language DAC conversion code
FPGA控制AD程序,ADC,DAC转换接口
- FPGA控制AD程序,ADC,DAC转换接口.rar 有限状态机控制AD采样.rar,FPGA control AD procedure
ad5399
- AD5399是一款串行输入、双通道、12位数模转换器，可采用二进制补码数字编码。。 用Verilog实现其配置与功能-AD5399 is a serial input, dual-channel, 12-bit DAC, digital code can be twos complement. . Configuration and use Verilog functions to achieve its
verilog-A_library
- Complete Verilog-A library for analog blocks, like ADC, DAC, amplifiers
adc0809dac0832control
- adc0809和dac的共同使用（verilog代码），虽然功能简单，但内容全面，新手原创，共同学习-adc0809 and dac common use (verilog code), although the function of simple, but comprehensive, new original, the common learning
DAC_TLV5616
- tlv5614的驱动程序，用verilog语言编写的，fpga芯片为altera公司的ep2c35。 调试成功放心使用-tlv5614 driver, using verilog language written in, fpga chips altera company ep2c35. Assured the success of the use of debugging
TLC5620
- Verilog HDL语言，FPGA实现TLC5620的DAC源代码-Verilog HDL language, FPGA implementation of the DAC TLC5620 source code
DA
- 采用Verilog在FPGA上实现一阶Σ-Δ DAC，仿真和实际验证都正确，基本可以达到16位DAC的信噪比
DAC
- 主要实现对DA转换器的控制、调试程序，使用Verilog语言实现其功能-Main achieved control of the DA converter, debugger, use the Verilog language function
ADC
- a verilog code about dac of audio codec on fpga board.
DAC
- a verilog code about dac of audio codec on fpga board.
dac
- DA芯片输出控制 SPI协议 只写不读 FPGA用 verilog-DA-chip SPI protocol output control does not read write-only FPGA with verilog
DAC-use-verilog
- 用verilog写的TLV5620芯片的DAC转换代码，核心文件dac.v，能进行实现，不仅仅是行为级描述-Written with verilog conversion code TLV5620 DAC chip, the core file dac.v, can be achieved, not just behavioral descr iption
dac
- 用verilog实现TLC5620——dac转换实验，转换0-255数字量，送数码管显示-The TLC5620- dac conversion experiments, convert 0-255 digital, send digital display with verilog
DAC-TLC5620_
- 基于verilog的硬件设计，DAC芯片TLC5620_verilog代码-The DAC chip TLC5620_verilog code verilog-based hardware design
delta-sigma-DAC
- 根据FPGA的∑-Δ D/A转换器的设计与实现策略，∑-Δ DAC的内部仅由2个10位的二进制加法器，1个10位的锁存器和一个D触发器组成，用FPGA实现时只需耗费极少的逻辑资源，即使用最小的FPGA也能实现。这是∑-Δ DAC实现的verilog语言-According to the FPGA Σ-Δ D/A converter design and implementation strategies, Σ-Δ DAC' s internal only by the two 10-bit
dac
- DAC CODE数据转换器设计里面将数字代码如何转换为模拟，与输入进行比较-VERILOG CODE
DAC-verilog
- dac数模转换程序，实现16bit数据转换功能，希望能帮到大家，互相学习-DAC digital analog conversion process, the realization of 16bit data transformation function, hope to help you, to learn each other